LtSpice Design
Design of Neural signal acquisition frontend | Prof. Mrigank Sharad
May 2017 – May 2017
Designed a robust sampling circuit using Transmission gate.
Designed Ramp Generator with reduced swing Cascoded Current Mirror.
Designed a fast, robust PMOS and NMOS Comparator with offset cancellation feature.
Integrated the aforementioned circuits together to make Analog Frontend of a Neural chip.